Microprocessors & Embedded Systems — B.Tech ECE Sem 5

Microprocessors — Introduction

Microprocessor: Single-chip CPU — ALU, control unit, registers. Needs external memory and I/O.

Evolution:

4-bit (Intel 4004, 1971) → 8-bit (8085, Z80) → 16-bit (8086)
→ 32-bit (80386, ARM) → 64-bit (x86-64, ARM64)

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1. Intel 8085 Architecture

Internal Structure:
┌─────────────────────────────────────┐
│  Accumulator (A) │ Flags (F)        │
│  B │ C           │  D │ E           │
│  H │ L           │                  │
│  Stack Pointer (SP) 16-bit          │
│  Program Counter (PC) 16-bit        │
│─────────────────────────────────────│
│  ALU                                │
│  Instruction Register + Decoder     │
│  Timing & Control Unit              │
│─────────────────────────────────────│
│  Address Bus (A8-A15) 8-bit         │
│  Multiplexed AD0-AD7 (addr+data)    │
│  Control: RD, WR, ALE, IO/M, S0,S1 │
└─────────────────────────────────────┘

Flag Register (F):

Bit: 7   6   5   4   3   2   1   0
     S   Z   -  AC   -   P   -  CY
S = Sign, Z = Zero, AC = Auxiliary Carry
P = Parity (even), CY = Carry

Addressing Modes:

Immediate: MVI A, 32H    ; A = 32H (data in instruction)
Register:  MOV A, B      ; A = B
Direct:    LDA 2050H     ; A = Memory[2050H]
Indirect:  MOV A, M      ; A = Memory[HL]
Implicit:  CMA           ; Complement A (no operand)

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2. 8085 Instruction Set

; Data Transfer
MOV Rd, Rs    ; Rd ← Rs
MVI Rd, data  ; Rd ← 8-bit data
LXI Rp, data  ; Rp ← 16-bit data (Load Register Pair)
LDA addr      ; A ← Memory[addr]
STA addr      ; Memory[addr] ← A
LHLD addr     ; H←M[addr+1], L←M[addr]
XCHG          ; HL ↔ DE

; Arithmetic
ADD R    ; A = A + R
ADI data ; A = A + data (immediate)
SUB R    ; A = A - R
INR R    ; R = R + 1 (no CY flag)
DCR R    ; R = R - 1
INX Rp   ; Rp = Rp + 1 (16-bit)
DAD Rp   ; HL = HL + Rp

; Logical
ANA R    ; A = A AND R
ORA R    ; A = A OR R
XRA R    ; A = A XOR R
CMA      ; A = NOT A
RLC/RRC  ; Rotate left/right through CY
RAL/RAR  ; Rotate through Accumulator + CY

; Branch
JMP addr   ; Unconditional jump
JZ addr    ; Jump if Zero flag set
JNZ addr   ; Jump if Zero flag clear
JC addr    ; Jump if Carry set
JNC addr   ; Jump if Carry clear
JP addr    ; Jump if Plus (S=0)
JM addr    ; Jump if Minus (S=1)
CALL addr  ; Call subroutine (push PC, jump)
RET        ; Return (pop PC)

; Stack
PUSH Rp    ; Push register pair onto stack
POP Rp     ; Pop from stack to register pair

; Control
NOP        ; No operation
HLT        ; Halt
EI/DI      ; Enable/Disable interrupts

Sample Program — Add two numbers:

MVI A, 25H    ; A = 25H
MVI B, 37H    ; B = 37H
ADD B         ; A = A + B = 5CH
STA 3000H     ; Store result in memory
HLT           ; Stop

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3. ARM Cortex Architecture

ARM Cortex families:

Cortex-M: Microcontrollers (M0, M3, M4, M7, M33)
  → STM32, Arduino, ESP32, nRF52
Cortex-R: Real-time (automotive, storage)
Cortex-A: Application processors (A53, A72, A78)
  → Smartphones, Raspberry Pi

Cortex-M Features:

Thumb-2 instruction set (16/32-bit mixed)
16 registers: R0-R12 (general), R13 (SP), R14 (LR), R15 (PC)
NVIC: Nested Vectored Interrupt Controller
SysTick: 24-bit timer for RTOS
MPU: Memory Protection Unit
FPU (M4/M7): floating point hardware

ARM Assembly (Cortex-M):

; Blink LED on GPIO pin
.thumb
.global _start

_start:
    LDR R0, =0x40021000   ; RCC base address
    LDR R1, [R0, #0x18]   ; Read RCC_AHBENR
    ORR R1, R1, #(1<<17)  ; Enable GPIOA clock
    STR R1, [R0, #0x18]

    LDR R0, =0x48000000   ; GPIOA base
    LDR R1, [R0, #0x00]   ; MODER register
    ORR R1, R1, #(1<<10)  ; PA5 as output
    STR R1, [R0, #0x00]

loop:
    LDR R1, [R0, #0x14]   ; Read ODR
    EOR R1, R1, #(1<<5)   ; Toggle PA5
    STR R1, [R0, #0x14]   ; Write ODR
    B loop

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4. Peripheral Interfacing

UART Communication

// STM32 UART init (HAL library)
UART_HandleTypeDef huart2;
huart2.Instance = USART2;
huart2.Init.BaudRate = 115200;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
HAL_UART_Init(&huart2);

// Transmit
char msg[] = "Hello ECE!\r\n";
HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), 100);

// Receive
uint8_t rxBuf[10];
HAL_UART_Receive(&huart2, rxBuf, 10, 1000);

SPI Communication

// SPI config: Master, 8-bit, Mode 0, 8MHz
SPI_HandleTypeDef hspi1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;   // CPOL=0
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;       // CPHA=0

uint8_t txData[] = {0xAB, 0xCD};
uint8_t rxData[2];
HAL_GPIO_WritePin(CS_GPIO_Port, CS_Pin, GPIO_PIN_RESET); // CS low
HAL_SPI_TransmitReceive(&hspi1, txData, rxData, 2, 100);
HAL_GPIO_WritePin(CS_GPIO_Port, CS_Pin, GPIO_PIN_SET);   // CS high

I2C Communication

// I2C: write to sensor register
uint8_t data[2] = {REG_ADDR, VALUE};
HAL_I2C_Master_Transmit(&hi2c1, SENSOR_ADDR<<1, data, 2, 100);

// Read from sensor
uint8_t reg = TEMP_REG;
uint8_t result[2];
HAL_I2C_Master_Transmit(&hi2c1, SENSOR_ADDR<<1, &reg, 1, 100);
HAL_I2C_Master_Receive(&hi2c1, SENSOR_ADDR<<1, result, 2, 100);
int16_t temp = (result[0]<<8) | result[1];

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5. RTOS Concepts

// FreeRTOS Example
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"

QueueHandle_t xQueue;

// Task 1: Sensor reading
void sensorTask(void *pvParam) {
    uint32_t sensorData;
    while(1) {
        sensorData = readSensor();
        xQueueSend(xQueue, &sensorData, portMAX_DELAY);
        vTaskDelay(pdMS_TO_TICKS(100));  // 100ms delay
    }
}

// Task 2: Data processing
void processTask(void *pvParam) {
    uint32_t data;
    while(1) {
        if (xQueueReceive(xQueue, &data, portMAX_DELAY)) {
            processData(data);
        }
    }
}

int main(void) {
    xQueue = xQueueCreate(10, sizeof(uint32_t));
    xTaskCreate(sensorTask,  "Sensor",  256, NULL, 2, NULL);
    xTaskCreate(processTask, "Process", 512, NULL, 1, NULL);
    vTaskStartScheduler();  // Start RTOS
}

RTOS Key Concepts:

Task States: Running → Ready → Blocked → Suspended
Scheduler: Preemptive priority-based
IPC mechanisms: Queue, Semaphore, Mutex, Event Group
Semaphore: counting (resource pool), binary (signaling)
Mutex: mutual exclusion, prevents priority inversion

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6. IoT Protocols

MQTT (Message Queuing Telemetry Transport):
  Publish-Subscribe over TCP
  Broker-based (Mosquitto, AWS IoT, HiveMQ)
  QoS levels: 0 (fire forget), 1 (at least once), 2 (exactly once)
  Lightweight — ideal for constrained devices

  import paho.mqtt.client as mqtt
  client = mqtt.Client()
  client.connect("broker.hivemq.com", 1883)
  client.publish("ece/sensor/temp", "25.3")

HTTP/REST:
  GET /api/sensors/1/temperature
  POST /api/sensors/1/data  {"temp": 25.3}
  Standard web APIs, heavier than MQTT

CoAP: UDP-based, like HTTP but lightweight
  For very constrained devices (microcontrollers)

Zigbee/Z-Wave: Mesh networking, home automation
LoRaWAN: Long range, low power (km range, years battery)
BLE: Bluetooth Low Energy — wearables, beacons

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Exam Important Questions

1. 8085 ka block diagram draw karo aur registers explain karo
2. 8085 instruction set — data transfer, arithmetic instructions
3. ARM Cortex-M aur 8085 compare karo
4. UART, SPI, I2C ka comparison — wires, speed, features
5. RTOS kya hai? Task states aur scheduler explain karo
6. Semaphore aur Mutex mein kya fark hai?
7. MQTT protocol kya hai? Publish-subscribe explain karo
8. FreeRTOS mein queue kaise use karte hain?

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Viva Questions

Q: Interrupt latency kya hota hai? A: Interrupt signal se ISR execution start hone tak ka time. Cortex-M3: 12 cycles (deterministic). RTOS interrupt latency = hardware latency + OS scheduling overhead.

Q: Bootloader kya hota hai embedded systems mein? A: Chip start pe pehle run hone wala small program. Firmware validate karta hai, update facilitate karta hai (UART/USB/OTA). STM32 mein built-in bootloader hai System Memory mein.

Q: Power consumption optimize kaise karein MCU mein? A: Sleep modes use karo (Sleep/Stop/Standby). Peripherals off karo jab use nahi. Clock frequency kam karo. Interrupts se wake up. Voltage scaling. DMA se CPU idle time badhao.