Digital Electronics Notes — B.Tech ECE Sem 2

Digital Electronics — Introduction

Digital systems binary language (0 and 1) mein kaam karte hain. 0V = Logic 0 (LOW), 5V = Logic 1 (HIGH) (TTL) ya 0V/3.3V (CMOS).

Advantages of Digital:

• Noise immunity (thresholds)
• Easy storage (memory)
• Processing (computers)
• Reproducibility

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1. Number Systems & Codes

BCD (Binary Coded Decimal):

Each decimal digit → 4-bit binary
9  → 1001
25 → 0010 0101
99 → 1001 1001
Useful for display drivers (7-segment)

Gray Code:

Decimal | Binary | Gray
   0    |  000   |  000
   1    |  001   |  001
   2    |  010   |  011  ← only 1 bit changes!
   3    |  011   |  010
   4    |  100   |  110
Gray = Binary XOR (Binary >> 1)
Used in shaft encoders, error detection

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2. Boolean Algebra & Logic Gates

Basic Gates:

AND:  Y = A·B  (output 1 only if all inputs 1)
OR:   Y = A+B  (output 1 if any input 1)
NOT:  Y = A'   (invert)
NAND: Y = (A·B)'  (AND then NOT) — Universal gate
NOR:  Y = (A+B)'  (OR then NOT) — Universal gate
XOR:  Y = A⊕B  (output 1 if inputs differ)
XNOR: Y = (A⊕B)' (output 1 if inputs same)

De Morgan's Theorems:

(A + B)' = A' · B'   → NOR = AND with inverted inputs
(A · B)' = A' + B'   → NAND = OR with inverted inputs

Proof: (AB)' — Truth table verification
A B | AB | (AB)'  | A'+B'
0 0 | 0  |   1   |   1    ✓
0 1 | 0  |   1   |   1    ✓
1 0 | 0  |   1   |   1    ✓
1 1 | 1  |   0   |   0    ✓

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3. Karnaugh Map (K-Map)

Minimize: F(A,B,C,D) = Σm(0,1,2,5,8,9,10)

      CD
AB  | 00 01 11 10
 00 |  1  1  0  1   ← m0,m1,m3→no, m2
 01 |  0  1  0  0   ← m5
 11 |  0  0  0  0
 10 |  1  1  0  1   ← m8,m9,m10

Groups:
- {m0,m1,m8,m9}: 4-cell → A'D' + B'D' = B'D' (A+A'=1)
  Wait: let's say → B'D'
- {m0,m2,m8,m10}: → B'C'  
- {m1,m5}: → A'CD'

Simplified: F = B'D' + B'C' + A'CD'

Rules:

1. Group sizes must be powers of 2 (1,2,4,8,16)
2. Groups can wrap around edges
3. Largest possible groups
4. Each 1 must be covered
5. Don't Cares (X) can be 0 or 1 — use to form bigger groups

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4. Combinational Circuits

Half Adder

A ──┬──[XOR]──── Sum = A⊕B
B ──┴──[AND]──── Carry = A·B

Full Adder

Sum  = A⊕B⊕Cin
Cout = A·B + B·Cin + A·Cin
     = A·B + Cin·(A⊕B)

4-bit Ripple Carry Adder

FA[0]: A0,B0,C0=0 → S0,C1
FA[1]: A1,B1,C1 → S1,C2
FA[2]: A2,B2,C2 → S2,C3
FA[3]: A3,B3,C3 → S3,C4(overflow)

Multiplexer (MUX)

2:1 MUX: Y = S'·I0 + S·I1 (Select S chooses input)
4:1 MUX: 2 select lines → 4 inputs → 1 output

8:1 MUX can implement any 3-variable function!
  Connect function's minterm values to inputs

Decoder

2:4 Decoder:
A1 A0 | D3 D2 D1 D0
 0  0 |  0  0  0  1   ← D0 = A1'A0'
 0  1 |  0  0  1  0   ← D1 = A1'A0
 1  0 |  0  1  0  0   ← D2 = A1 A0'
 1  1 |  1  0  0  0   ← D3 = A1 A0

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5. Sequential Circuits — Flip-Flops

SR Flip-Flop

S R | Q(next) | Comment
0 0 | Q       | No change
0 1 | 0       | Reset
1 0 | 1       | Set
1 1 | ?       | Invalid (forbidden)

JK Flip-Flop (Universal FF)

J K | Q(next) | Comment
0 0 | Q       | No change
0 1 | 0       | Reset
1 0 | 1       | Set
1 1 | Q'      | Toggle ← solves SR invalid state

D Flip-Flop (Data Latch)

D | Q(next)
0 | 0          Q follows D at clock edge
1 | 1
Most common in registers, memory

T Flip-Flop (Toggle)

T | Q(next)
0 | Q          No change
1 | Q'         Toggle
Used in counters: Q toggles every T=1

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6. Counters & Registers

Asynchronous (Ripple) Counter

3-bit binary up counter using T flip-flops:
FF0 (LSB): T=1 always → toggles every clock
FF1: T = Q0 → toggles when Q0=1
FF2: T = Q1 → toggles when Q1=1

Count: 000→001→010→011→100→101→110→111→000
Ripple delay issue: FF0→FF1→FF2 propagation

Synchronous Counter

All FFs clocked simultaneously → no ripple delay
4-bit: count 0-15
Logic:
T0 = 1 (always toggle)
T1 = Q0
T2 = Q0·Q1
T3 = Q0·Q1·Q2

Shift Register

Serial-In Serial-Out (SISO):
D→FF0→FF1→FF2→FF3→Out
Shift 1 bit right each clock

Applications: Serial communication, delay lines, CRC

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7. ADC & DAC

DAC (Digital to Analog)

R-2R Ladder Network:
4-bit input (D3 D2 D1 D0) → Vout

Vout = Vref × (D3/2 + D2/4 + D1/8 + D0/16)
     = Vref × (digital word / 2^n)

Resolution = Vref / 2^n  (for 8-bit, Vref=5V: 5/256 = 19.5mV)

ADC (Analog to Digital)

Types:
Flash ADC: 2^n-1 comparators → fastest, most expensive
Successive Approximation (SAR): Binary search → most common
Sigma-Delta: Oversampling + filtering → high resolution audio

Key specs:
- Resolution: n bits
- Sampling rate: Nyquist theorem → fs ≥ 2×fmax
- SNR: Signal-to-Noise Ratio

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Exam Important Questions

1. De Morgan's theorem prove karo truth table se
2. K-map use karke minimize karo: F = Σm(1,3,5,7)
3. Full adder ka circuit aur truth table
4. JK flip-flop ka truth table aur difference from SR
5. 3-bit asynchronous binary counter design karo
6. 4:1 MUX ka circuit draw karo
7. ADC aur DAC mein kya difference hai?
8. Gray code kya hai? 0-7 decimal ka Gray code table

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Viva Questions

Q: NAND gate universal gate kyun hai? A: Sirf NAND gates se NOT, AND, OR, NOR, XOR sab implement ho sakta hai. Proof: NOT A = NAND(A,A). AND = NOT(NAND). OR = NAND(NOT A, NOT B) by De Morgan.

Q: Synchronous counter asynchronous se better kyun hai? A: Async mein ripple delay se intermediate glitches aate hain (wrong count briefly). Sync mein sab FFs ek saath clock pe → no glitches, higher speed possible.

Q: Encoder aur Decoder mein kya fark hai? A: Encoder: 2^n inputs → n output bits (many-to-few, like keypad to binary). Decoder: n input bits → 2^n outputs (few-to-many, like memory address to chip select).